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Revolutionizing On-Board Processing
for Satellite Constellations

Our radiation-tolerant ASIC delivers server-grade SAR imaging in a compact, cost-effective form factor. By eliminating traditional hardware constraints, we empower the next generation of satellite constellations with real-time, on-orbit intelligence

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Recent Progress: Milestone Achivement

Breaking the Speed Barrier in SAR Imaging

We have successfully achieved real-time, multi-look image reconstruction from raw SAR data. By leveraging our proprietary hardware-accelerated algorithms, we have proven that what once took an entire day can now be accomplished in under a minute.

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The Proof of Concept (PoC)

Why This Matters for Our ASIC?

This milestone is more than just a speed test. Our FPGA implementation confirms a 99.99% performance correlation with our upcoming ASIC Chip architecture.

Why Simplus?

Performance

50x Energy Efficiency

low-power (2 W) on-board Computing,
low latency of sub-minutes

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Radiation Tolerant/Hardened

designed by former NASA-JPL ASIC chip design expert

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Real-time high-resolution SAR image processing

Integrated AI algorithms, low power (2 W), low latency of sub-minutes, enable real-time SAR image processing on-board